bindings/net/xlnx%2Cgmii-to-rgmii.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/xlnx,gmii-to-rgmii.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Harini Katakam <harini.katakam@amd.com>
14   Independent Interface (RGMII) core provides the RGMII between RGMII-compliant
17   The Management Data Input/Output (MDIO) interface is used to configure the
19   different speed modes by configuring the converter register through mdio write.
20   The core cannot function without an external phy connected to it.
24     const: xlnx,gmii-to-rgmii-1.0
31   phy-handle:
32     $ref: ethernet-controller.yaml#/properties/phy-handle
36       - description: 200/375 MHz free-running clock is used as input clock.
39   - compatible
40   - reg
41   - phy-handle
46   - |
47     mdio {
48         #address-cells = <1>;
49         #size-cells = <0>;
51         phy: ethernet-phy@0 {
55             compatible = "xlnx,gmii-to-rgmii-1.0";
57             phy-handle = <&phy>;