Lines Matching +full:0 +full:x40c00000

74       TX checksum offload. 0 or empty for disabling TX checksum offload,
78     enum: [0, 1, 2]
82       RX checksum offload. 0 or empty for disabling RX checksum offload,
86     enum: [0, 1, 2]
133       pattern: "^[tr]x_chan([0-9]|1[0-5])$"
156         interrupts = <2 0 1>;
160         reg = <0x40c00000 0x40000>,<0x50c00000 0x40000>;
161         dmas = <&xilinx_dma 0>, <&xilinx_dma 1>;
163         xlnx,rxcsum = <0x2>;
164         xlnx,rxmem = <0x800>;
165         xlnx,txcsum = <0x2>;
170             #size-cells = <0>;
181         interrupts = <0>;
185         reg = <0x40000000 0x40000>;
186         xlnx,rxcsum = <0x2>;
187         xlnx,rxmem = <0x800>;
188         xlnx,txcsum = <0x2>;
194             #size-cells = <0>;