bindings/net/socfpga-dwmac.txt

1 Altera SOCFPGA SoC DWMAC controller
3 This is a variant of the dwmac/stmmac driver an inherits all descriptions
9  - compatible	: For Cyclone5/Arria5 SoCs it should contain
10 		  "altr,socfpga-stmmac". For Arria10/Agilex/Stratix10 SoCs
11 		  "altr,socfpga-stmmac-a10-s10".
12 		  Along with "snps,dwmac" and any applicable more detailed
14  - altr,sysmgr-syscon : Should be the phandle to the system manager node that
20  - altr,f2h_ptp_ref_clk use f2h_ptp_ref_clk instead of default eosc1 clock
24 altr,emac-splitter: Should be the phandle to the emac splitter soft IP node if
25 		DWMAC controller is connected emac splitter.
26 phy-mode: The phy mode the ethernet operates in
27 altr,sgmii-to-sgmii-converter: phandle to the TSE SGMII converter
32  - compatible	: Should be altr,gmii-to-sgmii-2.0
33  - reg-names	: Should be "eth_tse_control_port"
38 	compatible = "altr,gmii-to-sgmii-2.0";
41 	reg-names = "eth_tse_control_port";
43 	clock-names = "tse_pcs_ref_clk_clock_connection", "tse_rx_cdr_refclk";
47 	compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
48 	altr,sysmgr-syscon = <&sysmgr 0x60 0>;
50 	interrupts = <0 115 4>;
51 	interrupt-names = "macirq";
52 	mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
54 	clock-names = "stmmaceth";
55 	phy-mode = "sgmii";
56 	altr,gmii-to-sgmii-converter = <&gmii_to_sgmii_converter>;