Lines Matching full:eqos
14 - "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10"
16 - "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10"
20 "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10". It is supported to be
28 The EQOS transmit path clock. The HW signal name is clk_tx_i.
33 The EQOS receive path clock. The HW signal name is clk_rx_i.
36 rx_125, rmii) may drive the EQOS RX path.
37 In cases where the PHY clock is directly fed into the EQOS receive path
72 - "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10":
78 - "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10":
92 - "eqos". The reset to the entire module. The HW signal name is hreset_n
97 - "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10":
98 - "eqos".
99 - "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10":