bindings/net/qcom-emac.txt

3 This network controller consists of two devices: a MAC and an SGMII
5 connects the MAC node to its corresponding internal phy node.  Another
10 MAC node:
11 - compatible : Should be "qcom,fsm9900-emac".
12 - reg : Offset and length of the register regions for the device
13 - interrupts : Interrupt number used by this controller
14 - mac-address : The 6-byte MAC address. If present, it is the default
15 	MAC address.
16 - internal-phy : phandle to the internal PHY node
17 - phy-handle : phandle to the external PHY node
20 - compatible : Should be "qcom,fsm9900-emac-sgmii" or "qcom,qdf2432-emac-sgmii".
21 - reg : Offset and length of the register region(s) for the device
22 - interrupts : Interrupt number used by this controller
25 - reg : The phy address
32 	#address-cells = <1>;
33 	#size-cells = <1>;
36 		compatible = "qcom,fsm9900-emac";
38 		      <0xfeb36000 0x1000>;
43 		clock-names = "axi_clk", "cfg_ahb_clk", "high_speed_clk",
46 		internal-phy = <&emac_sgmii>;
48 		phy-handle = <&phy0>;
50 		#address-cells = <1>;
51 		#size-cells = <0>;
52 		phy0: ethernet-phy@0 {
56 		pinctrl-names = "default";
57 		pinctrl-0 = <&mdio_pins_a>;
61 		compatible = "qcom,fsm9900-emac-sgmii";
62 		reg = <0xfeb38000 0x1000>;
67 		compatible = "qcom,fsm9900-pinctrl";
81 	#address-cells = <2>;
82 	#size-cells = <2>;
85 		compatible = "qcom,fsm9900-emac";
87 		      <0x0 0x38816000 0x0 0x1000>;
92 		clock-names = "axi_clk", "cfg_ahb_clk", "high_speed_clk",
95 		internal-phy = <&emac_sgmii>;
97 		phy-handle = <&phy0>;
99 		#address-cells = <1>;
100 		#size-cells = <0>;
101 		phy0: ethernet-phy@4 {
107 		compatible = "qcom,qdf2432-emac-sgmii";
109 		      <0x0 0x00410000 0x0 0x400>; /* Per-lane digital */