Lines Matching full:bpmp
124 clocks = <&bpmp TEGRA234_CLK_MGBE0_APP>,
125 <&bpmp TEGRA234_CLK_MGBE0_MAC>,
126 <&bpmp TEGRA234_CLK_MGBE0_MAC_DIVIDER>,
127 <&bpmp TEGRA234_CLK_MGBE0_PTP_REF>,
128 <&bpmp TEGRA234_CLK_MGBE0_RX_INPUT_M>,
129 <&bpmp TEGRA234_CLK_MGBE0_RX_INPUT>,
130 <&bpmp TEGRA234_CLK_MGBE0_TX>,
131 <&bpmp TEGRA234_CLK_MGBE0_EEE_PCS>,
132 <&bpmp TEGRA234_CLK_MGBE0_RX_PCS_INPUT>,
133 <&bpmp TEGRA234_CLK_MGBE0_RX_PCS_M>,
134 <&bpmp TEGRA234_CLK_MGBE0_RX_PCS>,
135 <&bpmp TEGRA234_CLK_MGBE0_TX_PCS>;
139 resets = <&bpmp TEGRA234_RESET_MGBE0_MAC>,
140 <&bpmp TEGRA234_RESET_MGBE0_PCS>;
146 power-domains = <&bpmp TEGRA234_POWER_DOMAIN_MGBEA>;