Lines Matching +full:post +full:- +full:delay
1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
17 bus. These should follow the generic ethernet-phy.yaml document, or
22 pattern: '^mdio(-(bus|external))?(@.+|-([0-9]+))?$'
24 "#address-cells":
27 "#size-cells":
30 reset-gpios:
36 reset-delay-us:
40 requirements (maximum value of all per-device RESET pulse widths).
42 reset-post-delay-us:
44 Delay after reset deassert in microseconds. It applies to all MDIO
46 communication. This delay happens just before e.g. Ethernet PHY
49 clock-frequency:
55 suppress-preamble:
62 '@[0-9a-f]+$':
72 broken-turn-around:
79 reset-gpios:
84 reset-assert-us:
86 Delay after the reset was asserted in microseconds. If this
87 property is missing the delay will be skipped.
89 reset-deassert-us:
91 Delay after the reset was deasserted in microseconds. If
92 this property is missing the delay will be skipped.
95 - reg
100 - |
103 #address-cells = <1>;
104 #size-cells = <0>;
106 reset-gpios = <&gpio2 5 1>;
107 reset-delay-us = <2>;
109 ethphy0: ethernet-phy@1 {
113 ethphy1: ethernet-phy@3 {