bindings/net/ethernet-controller.yaml

1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - David S. Miller <davem@davemloft.net>
19   local-mac-address:
22     $ref: /schemas/types.yaml#/definitions/uint8-array
26   mac-address:
31       local-mac-address property.
32     $ref: /schemas/types.yaml#/definitions/uint8-array
36   max-frame-size:
43   max-speed:
48   nvmem-cells:
53   nvmem-cell-names:
54     const: mac-address
56   phy-connection-type:
64       - internal
65       - mii
66       - gmii
67       - sgmii
68       - psgmii
69       - qsgmii
70       - qusgmii
71       - tbi
72       - rev-mii
73       - rmii
74       - rev-rmii
75       - moca
77       # RX and TX delays are added by the MAC when required
78       - rgmii
80       # RGMII with internal RX and TX delays provided by the PHY,
81       # the MAC should not add the RX or TX delays in this case
82       - rgmii-id
86       - rgmii-rxid
88       # RGMII with internal TX delay provided by the PHY, the MAC
89       # should not add an TX delay in this case
90       - rgmii-txid
91       - rtbi
92       - smii
93       - xgmii
94       - trgmii
95       - 1000base-x
96       - 2500base-x
97       - 5gbase-r
98       - rxaui
99       - xaui
101       # 10GBASE-KR, XFI, SFI
102       - 10gbase-kr
103       - usxgmii
104       - 10gbase-r
105       - 25gbase-r
106       - 10g-qxgmii
108   phy-mode:
109     $ref: "#/properties/phy-connection-type"
111   pcs-handle:
112     $ref: /schemas/types.yaml#/definitions/phandle-array
117       bus to link with an external PHY (phy-handle) if exists.
119   pcs-handle-names:
121       The name of each PCS in pcs-handle.
123   phy-handle:
129     $ref: "#/properties/phy-handle"
132   phy-device:
133     $ref: "#/properties/phy-handle"
136   rx-fifo-depth:
139       The size of the controller\'s receive fifo in bytes. This is used
140       for components that can have configurable receive fifo sizes,
149   tx-fifo-depth:
152       The size of the controller\'s transmit fifo in bytes. This
153       is used for components that can have configurable fifo sizes.
157       Specifies the PHY management type. If auto is set and fixed-link
162       - auto
163       - in-band-status
165   fixed-link:
167       - $ref: /schemas/types.yaml#/definitions/uint32-array
170           - minimum: 0
174               specified fixed-links
176           - enum: [0, 1]
181           - enum: [10, 100, 1000, 2500, 10000]
185           - enum: [0, 1]
189           - enum: [0, 1]
193       - type: object
202           full-duplex:
205               Indicates that full-duplex is used. When absent, half
213           asym-pause:
218           link-gpios:
224           - speed
236       '#address-cells':
239       '#size-cells':
243       '^led@[a-f0-9]+$':
255           - reg
262   pcs-handle-names: [pcs-handle]
265   - if:
267         phy-mode:
270               - rgmii
271               - rgmii-rxid
272               - rgmii-txid
273               - rgmii-id
276         rx-internal-delay-ps:
281         tx-internal-delay-ps:
284             controllers that have configurable TX internal delays. If this
285             property is present then the MAC applies the TX delay.