bindings/mtd/qcom%2Cnandc.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
15       - qcom,ipq806x-nand
16       - qcom,ipq4019-nand
17       - qcom,ipq6018-nand
18       - qcom,ipq8074-nand
19       - qcom,sdx55-nand
26       - description: Core Clock
27       - description: Always ON Clock
29   clock-names:
31       - const: core
32       - const: aon
34   qcom,cmd-crci:
40   qcom,data-crci:
47   "^nand@[a-f0-9]$":
49     $ref: raw-nand-chip.yaml
52       nand-bus-width:
55       nand-ecc-strength:
58       nand-ecc-step-size:
60           - 512
62       qcom,boot-partitions:
63         $ref: /schemas/types.yaml#/definitions/uint32-matrix
66             - description: offset
67             - description: size
69           Boot partition use a different layout where the 4 bytes of spare
81   - $ref: nand-controller.yaml#
83   - if:
87             const: qcom,ipq806x-nand
92             - description: rxtx DMA channel
94         dma-names:
96             - const: rxtx
98   - if:
103               - qcom,ipq4019-nand
104               - qcom,ipq6018-nand
105               - qcom,ipq8074-nand
106               - qcom,sdx55-nand
112             - description: tx DMA channel
113             - description: rx DMA channel
114             - description: cmd DMA channel
116         dma-names:
118             - const: tx
119             - const: rx
120             - const: cmd
122         qcom,cmd-crci: false
123         qcom,data-crci: false
126         "^nand@[a-f0-9]$":
128             qcom,boot-partitions: false
131   - compatible
132   - reg
133   - clocks
134   - clock-names
139   - |
140     #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
141     nand-controller@1ac00000 {
142         compatible = "qcom,ipq806x-nand";
147         clock-names = "core", "aon";
150         dma-names = "rxtx";
151         qcom,cmd-crci = <15>;
152         qcom,data-crci = <3>;
154         #address-cells = <1>;
155         #size-cells = <0>;
160             nand-ecc-strength = <4>;
161             nand-bus-width = <8>;
163             qcom,boot-partitions = <0x0 0x58a0000>;
166                 compatible = "fixed-partitions";
167                 #address-cells = <1>;
168                 #size-cells = <1>;
171                     label = "boot-nand";
176                     label = "fs-nand";
183     #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
184     nand-controller@79b0000 {
185         compatible = "qcom,ipq4019-nand";
190         clock-names = "core", "aon";
195         dma-names = "tx", "rx", "cmd";
197         #address-cells = <1>;
198         #size-cells = <0>;
202             nand-ecc-strength = <4>;
203             nand-bus-width = <8>;
206                 compatible = "fixed-partitions";
207                 #address-cells = <1>;
208                 #size-cells = <1>;
211                     label = "boot-nand";
216                     label = "fs-nand";