bindings/mmc/marvell%2Cxenon-sdhci.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/marvell,xenon-sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell Xenon SDHCI Controller
11   mmc-controller.yaml and the properties used by the Xenon implementation.
13   Multiple SDHCs might be put into a single Xenon IP, to save size and cost.
15   sets, clock and PHY.
20   - Ulf Hansson <ulf.hansson@linaro.org>
25       - enum:
26           - marvell,armada-cp110-sdhci
27           - marvell,armada-ap806-sdhci
29       - items:
30           - enum:
31               - marvell,armada-ap807-sdhci
32               - marvell,ac5-sdhci
33           - const: marvell,armada-ap806-sdhci
35       - items:
36           - const: marvell,armada-3700-sdhci
37           - const: marvell,sdhci-xenon
43       For "marvell,armada-3700-sdhci", two register areas.  The first one
44       for Xenon IP register. The second one for the Armada 3700 SoC PHY PAD
46       "marvell,armada-3700-sdhci" in below.
47       Please also check property marvell,pad-type in below.
49       For other compatible strings, one register area for Xenon IP.
55   clock-names:
58       - const: core
59       - const: axi
64   marvell,xenon-sdhc-id:
73   marvell,xenon-phy-type:
76       - emmc 5.1 phy
77       - emmc 5.0 phy
79       Xenon support multiple types of PHYs. To select eMMC 5.1 PHY, set:
80       marvell,xenon-phy-type = "emmc 5.1 phy" eMMC 5.1 PHY is the default
81       choice if this property is not provided.  To select eMMC 5.0 PHY, set:
82       marvell,xenon-phy-type = "emmc 5.0 phy"
85       this property only presents the type of PHY.  It doesn't stand for the
86       entire SDHC type or property.  For example, "emmc 5.1 phy" doesn't mean
87       that this Xenon SDHC only supports eMMC 5.1.
89   marvell,xenon-phy-znr:
95       Set PHY ZNR value.
96       Only available for eMMC PHY.
98   marvell,xenon-phy-zpr:
104       Set PHY ZPR value.
105       Only available for eMMC PHY.
107   marvell,xenon-phy-nr-success-tun:
116   marvell,xenon-phy-tun-step-divider:
122   marvell,xenon-phy-slow-mode:
125       If this property is selected, transfers will bypass PHY.
128       always occur with PHY enabled in eMMC HS SDR, SD SDR12, SD SDR25,
131   marvell,xenon-tun-count:
135       Xenon SDHC SoC usually doesn't provide re-tuning counter in
137       This property provides the re-tuning counter.
140   - $ref: mmc-controller.yaml#
141   - if:
145             const: marvell,armada-3700-sdhci
151             - description: Xenon IP registers
152             - description: Armada 3700 SoC PHY PAD Voltage Control register
154         marvell,pad-type:
157             - sd
158             - fixed-1-8v
160             Type of Armada 3700 SoC PHY PAD Voltage Controller register.
161             If "sd" is selected, SoC PHY PAD is set as 3.3V at the beginning
163             If "fixed-1-8v" is selected, SoC PHY PAD is fixed 1.8V, such as for
166             "marvell,armada-3700-sdhci" in below.
169         - marvell,pad-type
171   - if:
176               - marvell,armada-cp110-sdhci
177               - marvell,armada-ap807-sdhci
178               - marvell,armada-ap806-sdhci
185         clock-names:
187             - const: core
188             - const: axi
192   - compatible
193   - reg
194   - clocks
195   - clock-names
200   - |
202     #include <dt-bindings/interrupt-controller/arm-gic.h>
203     #include <dt-bindings/interrupt-controller/irq.h>
206       compatible = "marvell,armada-ap807-sdhci", "marvell,armada-ap806-sdhci";
210       clock-names = "core", "axi";
211       bus-width = <4>;
212       marvell,xenon-phy-slow-mode;
213       marvell,xenon-tun-count = <11>;
214       non-removable;
215       no-sd;
216       no-sdio;
221   - |
223     #include <dt-bindings/interrupt-controller/arm-gic.h>
224     #include <dt-bindings/interrupt-controller/irq.h>
227       compatible = "marvell,armada-cp110-sdhci";
230       vqmmc-supply = <&sd_vqmmc_regulator>;
231       vmmc-supply = <&sd_vmmc_regulator>;
233       clock-names = "core", "axi";
234       bus-width = <4>;
235       marvell,xenon-tun-count = <9>;
238   - |
239     // For eMMC with compatible "marvell,armada-3700-sdhci":
240     #include <dt-bindings/interrupt-controller/arm-gic.h>
241     #include <dt-bindings/interrupt-controller/irq.h>
244       compatible = "marvell,armada-3700-sdhci", "marvell,sdhci-xenon";
249       clock-names = "core";
250       bus-width = <8>;
251       mmc-ddr-1_8v;
252       mmc-hs400-1_8v;
253       non-removable;
254       no-sd;
255       no-sdio;
259       marvell,pad-type = "fixed-1-8v";
262   - |
263     // For SD/SDIO with compatible "marvell,armada-3700-sdhci":
264     #include <dt-bindings/interrupt-controller/arm-gic.h>
265     #include <dt-bindings/interrupt-controller/irq.h>
268       compatible = "marvell,armada-3700-sdhci", "marvell,sdhci-xenon";
272       vqmmc-supply = <&sd_regulator>;
275       clock-names = "core";
276       bus-width = <4>;
278       marvell,pad-type = "sd";