bindings/mfd/st%2Cstm32-timers.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11     - advanced-control timers consist of a 16-bit auto-reload counter driven
14     - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
16     - basic timers consist of a 16-bit auto-reload counter driven by a
20   - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
24     const: st,stm32-timers
32   clock-names:
34       - const: int
43   dma-names:
45       enum: [ ch1, ch2, ch3, ch4, up, trig, com ]
51       - maxItems: 1
52       - maxItems: 4
54   interrupt-names:
56       - items:
57           - const: global
58       - items:
59           - const: brk
60           - const: up
61           - const: trg-com
62           - const: cc
64   "#address-cells":
67   "#size-cells":
68     const: 0
70   access-controllers:
80         const: st,stm32-pwm
82       "#pwm-cells":
89         $ref: /schemas/types.yaml#/definitions/uint32-matrix
92             - description: |
93                 "index" indicates on which break input (0 or 1) the
95               enum: [0, 1]
96             - description: |
97                 "level" gives the active level (0=low or 1=high) of the
99               enum: [0, 1]
100             - description: |
107       - "#pwm-cells"
108       - compatible
116         const: st,stm32-timer-counter
119       - compatible
122   "^timer@[0-9]+$":
129           - st,stm32-timer-trigger
130           - st,stm32h7-timer-trigger
135           minimum: 0
139       - compatible
140       - reg
143   - compatible
144   - reg
145   - clocks
146   - clock-names
151   - |
152     #include <dt-bindings/clock/stm32mp1-clks.h>
154       #address-cells = <1>;
155       #size-cells = <0>;
156       compatible = "st,stm32-timers";
157       reg = <0x40000000 0x400>;
159       clock-names = "int";
160       dmas = <&dmamux1 18 0x400 0x1>,
161              <&dmamux1 19 0x400 0x1>,
162              <&dmamux1 20 0x400 0x1>,
163              <&dmamux1 21 0x400 0x1>,
164              <&dmamux1 22 0x400 0x1>;
165       dma-names = "ch1", "ch2", "ch3", "ch4", "up";
167         compatible = "st,stm32-pwm";
168         #pwm-cells = <3>;
169         st,breakinput = <0 1 5>;
172         compatible = "st,stm32-timer-trigger";
176         compatible = "st,stm32-timer-counter";