bindings/mfd/aspeed%2Cast2x00-scu.yaml

1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mfd/aspeed,ast2x00-scu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14   - Joel Stanley <joel@jms.id.au>
15   - Andrew Jeffery <andrew@aj.id.au>
20       - enum:
21           - aspeed,ast2400-scu
22           - aspeed,ast2500-scu
23           - aspeed,ast2600-scu
24       - const: syscon
25       - const: simple-mfd
32   '#address-cells':
35   '#size-cells':
38   '#clock-cells':
41   '#reset-cells':
45   '^p2a-control@[0-9a-f]+$':
46     description: See Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
49   '^pinctrl(@[0-9a-f]+)?$':
56             - aspeed,ast2400-pinctrl
57             - aspeed,ast2500-pinctrl
58             - aspeed,ast2600-pinctrl
61       - compatible
63   '^interrupt-controller@[0-9a-f]+$':
64 …  description: See Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2xxx-scu-ic.txt
67   '^silicon-id@[0-9a-f]+$':
68     description: Unique hardware silicon identifiers within the SoC
75           - enum:
76               - aspeed,ast2400-silicon-id
77               - aspeed,ast2500-silicon-id
78               - aspeed,ast2600-silicon-id
79           - const: aspeed,silicon-id
83           The reg should be the unique silicon id register, and not backwards
87           - description: silicon id information registers
88           - description: unique chip id registers
91   - compatible
92   - reg
93   - ranges
94   - '#address-cells'
95   - '#size-cells'
96   - '#clock-cells'
97   - '#reset-cells'
102   - |
104         compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
106         #clock-cells = <1>;
107         #reset-cells = <1>;
109         #address-cells = <1>;
110         #size-cells = <1>;
113         silicon-id@7c {
114             compatible = "aspeed,ast2500-silicon-id", "aspeed,silicon-id";