Lines Matching +full:external +full:- +full:memory +full:- +full:controller

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/st,stm32-fmc2-ebi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics Flexible Memory Controller 2 (FMC2)
11 asynchronous static devices (such as PSNOR, PSRAM or other memory-mapped
14 - to translate AXI transactions into the appropriate external device
16 - to meet the access time requirements of the external devices
17 All external devices share the addresses, data and control signals with the
18 controller. Each external device is accessed by means of a unique Chip
19 Select. The FMC2 performs only one access at a time to an external device.
22 - Christophe Kerello <christophe.kerello@foss.st.com>
27 - st,stm32mp1-fmc2-ebi
28 - st,stm32mp25-fmc2-ebi
39 power-domains:
42 "#address-cells":
45 "#size-cells":
50 Reflects the memory layout with four integer values per bank. Format:
51 <bank-number> 0 <address of the bank> <size>
53 access-controllers:
58 "^.*@[0-4],[a-f0-9]+$":
61 $ref: mc-peripheral-props.yaml#
64 - "#address-cells"
65 - "#size-cells"
66 - compatible
67 - reg
68 - clocks
69 - ranges
74 - |
75 #include <dt-bindings/interrupt-controller/arm-gic.h>
76 #include <dt-bindings/clock/stm32mp1-clks.h>
77 #include <dt-bindings/reset/stm32mp1-resets.h>
78 memory-controller@58002000 {
79 #address-cells = <2>;
80 #size-cells = <1>;
81 compatible = "st,stm32mp1-fmc2-ebi";
93 compatible = "mtd-ram";
95 bank-width = <2>;
97 st,fmc2-ebi-cs-transaction-type = <1>;
98 st,fmc2-ebi-cs-address-setup-ns = <60>;
99 st,fmc2-ebi-cs-data-setup-ns = <30>;
100 st,fmc2-ebi-cs-bus-turnaround-ns = <5>;
103 nand-controller@4,0 {
104 #address-cells = <1>;
105 #size-cells = <0>;
106 compatible = "st,stm32mp1-fmc2-nfc";
117 dma-names = "tx", "rx", "ecc";
121 nand-on-flash-bbt;
122 #address-cells = <1>;
123 #size-cells = <1>;