bindings/memory-controllers/mediatek%2Csmi-common.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-common.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11   - Yong Wu <yong.wu@mediatek.com>
22   register which control the iommu port is at each larb's register base. But
23   for generation 1, the register is at smi ao base(smi always on register
24   base). Besides that, the smi async clock should be prepared and enabled for
31       - enum:
32           - mediatek,mt2701-smi-common
33           - mediatek,mt2712-smi-common
34           - mediatek,mt6779-smi-common
35           - mediatek,mt6795-smi-common
36           - mediatek,mt8167-smi-common
37           - mediatek,mt8173-smi-common
38           - mediatek,mt8183-smi-common
39           - mediatek,mt8186-smi-common
40           - mediatek,mt8188-smi-common-vdo
41           - mediatek,mt8188-smi-common-vpp
42           - mediatek,mt8192-smi-common
43           - mediatek,mt8195-smi-common-vdo
44           - mediatek,mt8195-smi-common-vpp
45           - mediatek,mt8195-smi-sub-common
46           - mediatek,mt8365-smi-common
48       - description: for mt7623
50           - const: mediatek,mt7623-smi-common
51           - const: mediatek,mt2701-smi-common
56   power-domains:
61       apb and smi are mandatory. the async is only for generation 1 smi HW.
65       - description: apb is Advanced Peripheral Bus clock, It's the clock for
67       - description: smi is the clock for transfer data and command.
68       - description: Either asynchronous clock to help transform the smi clock
70       - description: gals1 is the path1 clock of gals.
72   clock-names:
78     description: a phandle to the smi-common node above. Only for sub-common.
81   - compatible
82   - reg
83   - power-domains
84   - clocks
85   - clock-names
88   - if:  # only for gen1 HW
93               - mediatek,mt2701-smi-common
99         clock-names:
101             - const: apb
102             - const: smi
103             - const: async
105   - if:  # only for sub common
110               - mediatek,mt8195-smi-sub-common
113         - mediatek,smi
118         clock-names:
120             - const: apb
121             - const: smi
122             - const: gals0
127   - if:  # for gen2 HW that have gals
131             - mediatek,mt6779-smi-common
132             - mediatek,mt8183-smi-common
133             - mediatek,mt8186-smi-common
134             - mediatek,mt8192-smi-common
135             - mediatek,mt8195-smi-common-vdo
136             - mediatek,mt8195-smi-common-vpp
137             - mediatek,mt8365-smi-common
144         clock-names:
146             - const: apb
147             - const: smi
148             - const: gals0
149             - const: gals1
151   - if:  # for gen2 HW that don't have gals
155             - mediatek,mt2712-smi-common
156             - mediatek,mt6795-smi-common
157             - mediatek,mt8167-smi-common
158             - mediatek,mt8173-smi-common
165         clock-names:
167             - const: apb
168             - const: smi
173   - |+
174     #include <dt-bindings/clock/mt8173-clk.h>
175     #include <dt-bindings/power/mt8173-power.h>
178             compatible = "mediatek,mt8173-smi-common";
180             power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
183             clock-names = "apb", "smi";