Lines Matching +full:half +full:- +full:bus

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral properties for Intel IXP4xx Expansion Bus
10   The IXP4xx expansion bus controller handles access to devices on the
11   memory-mapped expansion bus on the Intel IXP4xx family of system on chips,
15   - Linus Walleij <linus.walleij@linaro.org>
18   intel,ixp4xx-eb-t1:
23   intel,ixp4xx-eb-t2:
28   intel,ixp4xx-eb-t3:
33   intel,ixp4xx-eb-t4:
38   intel,ixp4xx-eb-t5:
43   intel,ixp4xx-eb-cycle-type:
44     description: The type of cycles to use on the expansion bus for this
49   intel,ixp4xx-eb-byte-access-on-halfword:
50     description: Allow byte read access on half word devices.
54   intel,ixp4xx-eb-hpi-hrdy-pol-high:
59   intel,ixp4xx-eb-mux-address-and-data:
60     description: Multiplex address and data on the data bus.
64   intel,ixp4xx-eb-ahb-split-transfers:
69   intel,ixp4xx-eb-write-enable:
74   intel,ixp4xx-eb-byte-access:
75     description: Expansion bus uses only 8 bits. The default is to use