Lines Matching +full:ifc +full:- +full:nand
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,ifc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
13 NXP's integrated flash controller (IFC) is an advanced version of the
15 interfaces with an extended feature set. The IFC provides access to multiple
16 external memory types, such as NAND flash (SLC and MLC), NOR flash, EPROM,
21 pattern: "^memory-controller@[0-9a-f]+$"
24 const: fsl,ifc
26 "#address-cells":
32 "#size-cells":
44 IFC may have one or two interrupts. If two interrupt specifiers are
46 second is the NAND interrupt (NAND_EVTER_STAT). If there is only one,
49 little-endian:
52 If this property is absent, the big-endian mode will be in use as default
61 "^.*@[a-f0-9]+(,[a-f0-9]+)+$":
64 Child device nodes describe the devices connected to IFC such as NOR (e.g.
65 cfi-flash) and NAND (fsl,ifc-nand). There might be board specific devices
69 - compatible
70 - reg
73 - compatible
74 - reg
75 - interrupts
80 - |
82 #address-cells = <2>;
83 #size-cells = <2>;
85 memory-controller@ffe1e000 {
86 compatible = "fsl,ifc";
87 #address-cells = <2>;
88 #size-cells = <1>;
91 little-endian;
93 /* NOR, NAND Flashes and CPLD on board */
99 #address-cells = <1>;
100 #size-cells = <1>;
101 compatible = "cfi-flash";
103 bank-width = <2>;
104 device-width = <1>;