Lines Matching +full:a +full:- +full:f0 +full:- +full:9
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,ifc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
17 SRAM and other memories where address and data are shared on a bus.
21 pattern: "^memory-controller@[0-9a-f]+$"
26 "#address-cells":
32 "#size-cells":
49 little-endian:
52 If this property is absent, the big-endian mode will be in use as default
57 Each range corresponds to a single chipselect, and covers the entire
61 "^.*@[a-f0-9]+(,[a-f0-9]+)+$":
65 cfi-flash) and NAND (fsl,ifc-nand). There might be board specific devices
69 - compatible
70 - reg
73 - compatible
74 - reg
75 - interrupts
80 - |
82 #address-cells = <2>;
83 #size-cells = <2>;
85 memory-controller@ffe1e000 {
87 #address-cells = <2>;
88 #size-cells = <1>;
91 little-endian;
99 #address-cells = <1>;
100 #size-cells = <1>;
101 compatible = "cfi-flash";
103 bank-width = <2>;
104 device-width = <1>;