media/xilinx/xlnx%2Ccsi2rxss.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx MIPI CSI-2 Receiver Subsystem
10   - Vishal Sagar <vishal.sagar@amd.com>
13   The Xilinx MIPI CSI-2 Receiver Subsystem is used to capture MIPI CSI-2
15   video data for image processing.
16   The subsystem consists of a MIPI D-PHY in slave mode which captures the
17   data packets. This is passed along the MIPI CSI-2 Rx IP which extracts the
18   packet data. The optional Video Format Bridge (VFB) converts this data to
19   AXI4 Stream video data.
20   For more details, please refer to PG232 Xilinx MIPI CSI-2 Receiver Subsystem.
21   Please note that this bindings includes only the MIPI CSI-2 Rx controller
22   and Video Format Bridge and not D-PHY.
27       - enum:
28           - xlnx,mipi-csi2-rx-subsystem-5.0
39       - description: AXI Lite clock
40       - description: Video clock
42   clock-names:
44       - const: lite_aclk
45       - const: video_aclk
47   xlnx,csi-pxl-format:
49       This denotes the CSI Data type selected in hw design.
50       Packets other than this data type (except for RAW8 and
51       User defined data types) will be filtered out.
52       Possible values are as below -
53       0x1e - YUV4228B
54       0x1f - YUV42210B
55       0x20 - RGB444
56       0x21 - RGB555
57       0x22 - RGB565
58       0x23 - RGB666
59       0x24 - RGB888
60       0x28 - RAW6
61       0x29 - RAW7
62       0x2a - RAW8
63       0x2b - RAW10
64       0x2c - RAW12
65       0x2d - RAW14
66       0x2e - RAW16
67       0x2f - RAW20
70       - minimum: 0x1e
72       - minimum: 0x28
79   xlnx,en-csi-v2-0:
83   xlnx,en-vcx:
88   xlnx,en-active-lanes:
91       Present if the number of active lanes can be re-configured at
92       runtime in the Protocol Configuration Register. Otherwise all lanes,
95   video-reset-gpios:
104         $ref: /schemas/graph.yaml#/$defs/port-base
107           CSI-2 transmitter.
111             $ref: /schemas/media/video-interfaces.yaml#
115               data-lanes:
118                   connects to MIPI CSI-2 source like sensor.
119                   The possible values are -
120                   1       - For 1 lane enabled in IP.
121                   1 2     - For 2 lanes enabled in IP.
122                   1 2 3   - For 3 lanes enabled in IP.
123                   1 2 3 4 - For 4 lanes enabled in IP.
125                   - const: 1
126                   - const: 2
127                   - const: 3
128                   - const: 4
131               - data-lanes
139           connected the CSI-2 receiver.
142   - compatible
143   - reg
144   - interrupts
145   - clocks
146   - clock-names
147   - ports
150   - if:
152         - xlnx,vfb
155         - xlnx,csi-pxl-format
158         xlnx,csi-pxl-format: false
160   - if:
163           - xlnx,en-csi-v2-0
166         xlnx,en-vcx: false
171   - |
172     #include <dt-bindings/gpio/gpio.h>
174         compatible = "xlnx,mipi-csi2-rx-subsystem-5.0";
176         interrupt-parent = <&gic>;
178         xlnx,csi-pxl-format = <0x2a>;
180         xlnx,en-active-lanes;
181         xlnx,en-csi-v2-0;
182         xlnx,en-vcx;
183         clock-names = "lite_aclk", "video_aclk";
185         video-reset-gpios = <&gpio 86 GPIO_ACTIVE_LOW>;
188             #address-cells = <1>;
189             #size-cells = <0>;
195                     data-lanes = <1 2 3 4>;
196                     /* MIPI CSI-2 Camera handle */
197                     remote-endpoint = <&camera_out>;
204                     remote-endpoint = <&vproc_in>;