Lines Matching +full:gcc +full:- +full:msm8916

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/qcom,msm8916-camss.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Robert Foss <robert.foss@linaro.org>
12 - Todor Tomov <todor.too@gmail.com>
19 const: qcom,msm8916-camss
25 clock-names:
27 - const: top_ahb
28 - const: ispif_ahb
29 - const: csiphy0_timer
30 - const: csiphy1_timer
31 - const: csi0_ahb
32 - const: csi0
33 - const: csi0_phy
34 - const: csi0_pix
35 - const: csi0_rdi
36 - const: csi1_ahb
37 - const: csi1
38 - const: csi1_phy
39 - const: csi1_pix
40 - const: csi1_rdi
41 - const: ahb
42 - const: vfe0
43 - const: csi_vfe0
44 - const: vfe_ahb
45 - const: vfe_axi
51 interrupt-names:
53 - const: csiphy0
54 - const: csiphy1
55 - const: csid0
56 - const: csid1
57 - const: ispif
58 - const: vfe0
63 power-domains:
65 - description: VFE GDSC - Video Front End, Global Distributed Switch Controller.
75 $ref: /schemas/graph.yaml#/$defs/port-base
82 $ref: video-interfaces.yaml#
86 data-lanes:
98 - data-lanes
101 $ref: /schemas/graph.yaml#/$defs/port-base
108 $ref: video-interfaces.yaml#
112 data-lanes:
117 - data-lanes
123 reg-names:
125 - const: csiphy0
126 - const: csiphy0_clk_mux
127 - const: csiphy1
128 - const: csiphy1_clk_mux
129 - const: csid0
130 - const: csid1
131 - const: ispif
132 - const: csi_clk_mux
133 - const: vfe0
135 vdda-supply:
140 - clock-names
141 - clocks
142 - compatible
143 - interrupt-names
144 - interrupts
145 - iommus
146 - power-domains
147 - reg
148 - reg-names
149 - vdda-supply
154 - |
155 #include <dt-bindings/interrupt-controller/arm-gic.h>
156 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
159 compatible = "qcom,msm8916-camss";
161 clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
162 <&gcc GCC_CAMSS_ISPIF_AHB_CLK>,
163 <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>,
164 <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>,
165 <&gcc GCC_CAMSS_CSI0_AHB_CLK>,
166 <&gcc GCC_CAMSS_CSI0_CLK>,
167 <&gcc GCC_CAMSS_CSI0PHY_CLK>,
168 <&gcc GCC_CAMSS_CSI0PIX_CLK>,
169 <&gcc GCC_CAMSS_CSI0RDI_CLK>,
170 <&gcc GCC_CAMSS_CSI1_AHB_CLK>,
171 <&gcc GCC_CAMSS_CSI1_CLK>,
172 <&gcc GCC_CAMSS_CSI1PHY_CLK>,
173 <&gcc GCC_CAMSS_CSI1PIX_CLK>,
174 <&gcc GCC_CAMSS_CSI1RDI_CLK>,
175 <&gcc GCC_CAMSS_AHB_CLK>,
176 <&gcc GCC_CAMSS_VFE0_CLK>,
177 <&gcc GCC_CAMSS_CSI_VFE0_CLK>,
178 <&gcc GCC_CAMSS_VFE_AHB_CLK>,
179 <&gcc GCC_CAMSS_VFE_AXI_CLK>;
181 clock-names = "top_ahb",
208 interrupt-names = "csiphy0",
217 power-domains = <&gcc VFE_GDSC>;
229 reg-names = "csiphy0",
239 vdda-supply = <&reg_2v8>;
242 #address-cells = <1>;
243 #size-cells = <0>;