Lines Matching +full:csi +full:- +full:pclk

1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-csi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A31 CMOS Sensor Interface (CSI)
10   - Chen-Yu Tsai <wens@csie.org>
11   - Maxime Ripard <mripard@kernel.org>
16       - allwinner,sun6i-a31-csi
17       - allwinner,sun8i-a83t-csi
18       - allwinner,sun8i-h3-csi
19       - allwinner,sun8i-v3s-csi
20       - allwinner,sun50i-a64-csi
30       - description: Bus Clock
31       - description: Module Clock
32       - description: DRAM Clock
34   clock-names:
36       - const: bus
37       - const: mod
38       - const: ram
44     $ref: /schemas/graph.yaml#/$defs/port-base
49         $ref: video-interfaces.yaml#
53           bus-width:
56           pclk-sample: true
57           hsync-active: true
58           vsync-active: true
61           - bus-width
74         description: MIPI CSI-2 bridge input port
81       - required:
82           - port@0
83       - required:
84           - port@1
87   - compatible
88   - reg
89   - interrupts
90   - clocks
91   - clock-names
92   - resets
95   - required:
96       - ports
97   - required:
98       - port
103   - |
104     #include <dt-bindings/interrupt-controller/arm-gic.h>
105     #include <dt-bindings/clock/sun8i-v3s-ccu.h>
106     #include <dt-bindings/reset/sun8i-v3s-ccu.h>
108     csi1: csi@1cb4000 {
109         compatible = "allwinner,sun8i-v3s-csi";
115         clock-names = "bus",
121             #address-cells = <1>;
122             #size-cells = <0>;
128                     remote-endpoint = <&adv7611_ep>;
129                     bus-width = <16>;
132                      * If hsync-active/vsync-active are missing,
135                     hsync-active = <0>; /* Active low */
136                     vsync-active = <0>; /* Active low */
137                     pclk-sample = <1>;  /* Rising */