Lines Matching full:required

245 required:
269 # The reference to the memory controller is required to ensure that the
272 required:
294 - description: bus clock required for downstream bus access and for
304 - description: interface clock required to access smmu's registers
306 - description: bus clock required for memory access
307 - description: bus clock required for GPU memory access
316 - description: interface clock required to access mnoc's registers
318 - description: interface clock required to access smmu's registers
320 - description: bus clock required for the smmu ptw
336 - description: bus clock required for downstream bus access and for
346 - description: interface clock required to access smmu's registers
348 - description: bus clock required for memory access
349 - description: bus clock required for GPU memory access
359 - description: interface clock required to access mnoc's registers
361 - description: interface clock required to access smmu's registers
363 - description: bus clock required for downstream bus access
364 - description: bus clock required for the smmu ptw
383 - description: bus clock required for downstream bus access and for
385 - description: interface clock required to access smmu's registers
438 - description: bus clock required for AHB bus access
439 - description: bus clock required for downstream bus access and for
441 - description: interface clock required to access smmu's registers
490 - description: Voter clock required for HLOS SMMU access
491 - description: Interface clock required for register access
586 required: