Lines Matching +full:shared +full:- +full:interrupt

1 * SPEAr Shared IRQ layer (shirq)
3 SPEAr3xx architecture includes shared/multiplexed irqs for certain set
4 of devices. The multiplexor provides a single interrupt to parent
5 interrupt controller (VIC) on behalf of a group of devices.
13 A single node in the device tree is used to describe the shared
14 interrupt multiplexor (one node for all groups). A group in the
15 interrupt controller shares config/control registers with other groups.
16 For example, a 32-bit interrupt enable/disable config register can
17 accommodate up to 4 interrupt groups.
20   - compatible: should be, either of
21      - "st,spear300-shirq"
22      - "st,spear310-shirq"
23      - "st,spear320-shirq"
24   - interrupt-controller: Identifies the node as an interrupt controller.
25   - #interrupt-cells: should be <1> which basically contains the offset
27   - reg: Base address and size of shirq registers.
28   - interrupts: The list of interrupts generated by the groups which are
29     then connected to a parent interrupt controller. Each group is
31     parent) is equal to number of groups. The format of the interrupt
32     specifier depends in the interrupt parent controller.
38 shirq: interrupt-controller@b3000000 {
39 	compatible = "st,spear320-shirq";
42 	#interrupt-cells = <1>;
43 	interrupt-controller;