Lines Matching +full:sense +full:- +full:bitfield +full:- +full:width
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/renesas,intc-irqpin.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
15 - enum:
16 - renesas,intc-irqpin-r8a7740 # R-Mobile A1
17 - renesas,intc-irqpin-r8a7778 # R-Car M1A
18 - renesas,intc-irqpin-r8a7779 # R-Car H1
19 - renesas,intc-irqpin-sh73a0 # SH-Mobile AG5
20 - const: renesas,intc-irqpin
25 - description: Interrupt control register
26 - description: Interrupt priority register
27 - description: Interrupt source register
28 - description: Interrupt mask register
29 - description: Interrupt mask clear register
30 - description: Interrupt control register for ICR0 with IRLM0 bit
32 interrupt-controller: true
34 '#interrupt-cells':
41 sense-bitfield-width:
46 Width of a single sense bitfield in the SENSE register, if different from the
49 control-parent:
58 power-domains:
62 - compatible
63 - reg
64 - interrupt-controller
65 - '#interrupt-cells'
66 - interrupts
73 - renesas,intc-irqpin-r8a7740
74 - renesas,intc-irqpin-sh73a0
77 - clocks
78 - power-domains
83 - |
84 #include <dt-bindings/clock/r8a7740-clock.h>
85 #include <dt-bindings/interrupt-controller/arm-gic.h>
86 #include <dt-bindings/interrupt-controller/irq.h>
88 irqpin1: interrupt-controller@e6900004 {
89 compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
95 interrupt-controller;
96 #interrupt-cells = <2>;
106 power-domains = <&pd_a4s>;