bindings/interrupt-controller/qcom%2Cmpm.yaml

4 $id: http://devicetree.org/schemas/interrupt-controller/qcom,mpm.yaml#
7 title: Qualcom MPM Interrupt Controller
14   MSM Power Manager (MPM) that is in always-on domain. In addition to managing
26       - const: qcom,mpm
37       Phandle to the APSS MPM slice of the RPM Message RAM
54       The first cell is the MPM pin number for the interrupt, and the second
57   qcom,mpm-pin-count:
59       Specify the total MPM pin count that a SoC supports.
62   qcom,mpm-pin-map:
64       A set of MPM pin numbers and the corresponding GIC SPIs.
68         - description: MPM pin number
69         - description: GIC SPI number for the MPM pin
80   - qcom,mpm-pin-count
81   - qcom,mpm-pin-map
101         mpm: interrupt-controller {
102             compatible = "qcom,mpm";
109             qcom,mpm-pin-count = <96>;
110             qcom,mpm-pin-map = <2 275>,