bindings/interrupt-controller/nvidia%2Ctegra20-ictlr.txt

1 NVIDIA Legacy Interrupt Controller
3 All Tegra SoCs contain a legacy interrupt controller that routes
7 The HW block exposes a number of interrupt controllers, each
12 - compatible : should be: "nvidia,tegra<chip>-ictlr". The LIC on
13   subsequent SoCs remained backwards-compatible with Tegra30, so on
15   include "nvidia,tegra30-ictlr".
16 - reg : Specifies base physical address and size of the registers.
17   Each controller must be described separately (Tegra20 has 4 of them,
19 - interrupt-controller : Identifies the node as an interrupt controller.
20 - #interrupt-cells : Specifies the number of cells needed to encode an
21   interrupt source. The value must be 3.
25 - Because this HW ultimately routes interrupts to the GIC, the
26   interrupt specifier must be that of the GIC.
27 - Only SPIs can use the ictlr as an interrupt parent. SGIs and PPIs
32 	ictlr: interrupt-controller@60004000 {
33 		compatible = "nvidia,tegra20-ictlr", "nvidia,tegra-ictlr";
38 		interrupt-controller;
39 		#interrupt-cells = <3>;
40 		interrupt-parent = <&intc>;