bindings/interrupt-controller/mstar%2Cmst-intc.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/mstar,mst-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MStar Interrupt Controller
10   - Mark-PK Tsai <mark-pk.tsai@mediatek.com>
13   MStar, SigmaStar and Mediatek TV SoCs contain multiple legacy
14   interrupt controllers that routes interrupts to the GIC.
16   The HW block exposes a number of interrupt controllers, each
21     const: mstar,mst-intc
23   interrupt-controller: true
25   "#interrupt-cells":
33   mstar,irqs-map-range:
35       The range <start, end> of parent interrupt controller's interrupt
36       lines that are hardwired to mstar interrupt controller.
37     $ref: /schemas/types.yaml#/definitions/uint32-matrix
42   mstar,intc-no-eoi:
44       Mark this controller has no End Of Interrupt(EOI) implementation.
48   - compatible
49   - reg
50   - mstar,irqs-map-range
55   - |
56     mst_intc0: interrupt-controller@1f2032d0 {
57       compatible = "mstar,mst-intc";
58       interrupt-controller;
59       #interrupt-cells = <3>;
60       interrupt-parent = <&gic>;
62       mstar,irqs-map-range = <0 63>;