bindings/interrupt-controller/loongson%2Cliointc.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,liointc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson Local I/O Interrupt Controller
10   - Jiaxun Yang <jiaxun.yang@flygoat.com>
13   This interrupt controller is found in the Loongson-3 family of chips and
14   Loongson-2K series chips, as the primary package interrupt controller which
17   1.The Loongson-2K0500 is a single core CPU;
18   2.The Loongson-2K0500/2K1000 has 64 device interrupt sources as inputs, so we
19     need to define two nodes in dts{i} to describe the "0-31" and "32-61" interrupt
23   - $ref: /schemas/interrupt-controller.yaml#
28       - loongson,liointc-1.0
29       - loongson,liointc-1.0a
30       - loongson,liointc-2.0
36   reg-names:
38       - const: main
39       - const: isr0
40       - const: isr1
41     minItems: 2
43   interrupt-controller: true
51   interrupt-names:
54       pattern: int[0-3]
58   '#interrupt-cells':
59     const: 2
61   loongson,parent_int_map:
68     $ref: /schemas/types.yaml#/definitions/uint32-array
73   - compatible
74   - reg
75   - interrupts
76   - interrupt-names
77   - interrupt-controller
78   - '#interrupt-cells'
79   - loongson,parent_int_map
89           - loongson,liointc-2.0
94       minItems: 2
98     - reg-names
106   - |
107     iointc: interrupt-controller@3ff01400 {
108       compatible = "loongson,liointc-1.0";
111       interrupt-controller;
112       #interrupt-cells = <2>;
114       interrupt-parent = <&cpuintc>;
115       interrupts = <2>, <3>;
116       interrupt-names = "int0", "int1";
118       loongson,parent_int_map = <0xf0ffffff>, /* int0 */