Lines Matching +full:input +full:- +full:clock +full:- +full:frequency
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandru Tachici <alexandru.tachici@analog.com>
15 - adi,adis16375
16 - adi,adis16480
17 - adi,adis16485
18 - adi,adis16488
19 - adi,adis16490
20 - adi,adis16495-1
21 - adi,adis16495-2
22 - adi,adis16495-3
23 - adi,adis16497-1
24 - adi,adis16497-2
25 - adi,adis16497-3
26 - adi,adis16545-1
27 - adi,adis16545-2
28 - adi,adis16545-3
29 - adi,adis16547-1
30 - adi,adis16547-2
31 - adi,adis16547-3
44 interrupt-names:
51 - DIO1
52 - DIO2
53 - DIO3
54 - DIO4
56 spi-cpha: true
57 spi-cpol: true
59 reset-gpios:
65 description: If not provided, then the internal clock is used.
67 clock-names:
69 sync: In sync mode, the internal clock is disabled and the frequency
70 of the external clock signal establishes therate of data
72 The clock-frequency must be:
76 production is equal to the product of the external clock
77 frequency and the scale factor in the SYNC_SCALE register, see
79 The clock-frequency must be:
83 - sync
84 - pps
86 adi,ext-clk-pin:
89 The DIOx line to be used as an external clock input.
91 selection or external clock input). When a single pin has two
95 If not provided then DIO2 is assigned as default external clock
96 input pin.
98 - DIO1
99 - DIO2
100 - DIO3
101 - DIO4
104 - compatible
105 - reg
106 - interrupts
107 - spi-cpha
108 - spi-cpol
109 - spi-max-frequency
112 - $ref: /schemas/spi/spi-peripheral-props.yaml#
117 - |
118 #include <dt-bindings/interrupt-controller/irq.h>
120 #address-cells = <1>;
121 #size-cells = <0>;
124 compatible = "adi,adis16495-1";
126 spi-max-frequency = <3200000>;
127 spi-cpol;
128 spi-cpha;
130 interrupt-parent = <&gpio>;
131 interrupt-names = "DIO2";
133 clock-names = "sync";
134 adi,ext-clk-pin = "DIO1";