Lines Matching full:ams

4 $id: http://devicetree.org/schemas/iio/adc/xlnx,zynqmp-ams.yaml#
7 title: Xilinx Zynq Ultrascale AMS controller
13   The AMS (Analog Monitoring System) includes an ADC as well as on-chip sensors
16   The AMS has two SYSMON blocks which are PL (Programmable Logic) SYSMON and
18   All designs should have AMS registers, but PS and PL are optional. The
19   AMS controller can work with only PS, only PL and both PS and PL
21   should always have AMS module property. Providing PS & PL module is optional.
23   AMS Channel Details
28   AMS CTRL      |0      |System PLLs voltage measurement, VCC_PSPLL.                    |Voltage
86       - xlnx,zynqmp-ams
92     description: AMS Controller register space
97       - description: AMS reference clock
113   ams-ps@0:
123           - xlnx,zynqmp-ams-ps
135   ams-pl@400:
149               - xlnx,zynqmp-ams-pl
202         xilinx_ams: ams@ffa50000 {
203             compatible = "xlnx,zynqmp-ams";
213             ams_ps: ams-ps@0 {
214                 compatible = "xlnx,zynqmp-ams-ps";
218             ams_pl: ams-pl@400 {
219                 compatible = "xlnx,zynqmp-ams-pl";