iio/adc/atmel%2Csama5d2-adc.yaml

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/atmel,sama5d2-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Eugen Hristev <eugen.hristev@microchip.com>
15       - atmel,sama5d2-adc
16       - microchip,sam9x60-adc
17       - microchip,sama7g5-adc
28   clock-names:
31   vref-supply: true
32   vddana-supply: true
34   atmel,min-sample-rate-hz:
35     description: Minimum sampling rate, it depends on SoC.
37   atmel,max-sample-rate-hz:
38     description: Maximum sampling rate, it depends on SoC.
40   atmel,startup-time-ms:
43   atmel,trigger-edge-type:
55   dma-names:
58   "#io-channel-cells":
64   - compatible
65   - reg
66   - interrupts
67   - clocks
68   - clock-names
69   - vref-supply
70   - vddana-supply
71   - atmel,min-sample-rate-hz
72   - atmel,max-sample-rate-hz
73   - atmel,startup-time-ms
76   - |
77     #include <dt-bindings/dma/at91.h>
78     #include <dt-bindings/interrupt-controller/irq.h>
80         #address-cells = <1>;
81         #size-cells = <1>;
84             compatible = "atmel,sama5d2-adc";
88             clock-names = "adc_clk";
89             atmel,min-sample-rate-hz = <200000>;
90             atmel,max-sample-rate-hz = <20000000>;
91             atmel,startup-time-ms = <4>;
92             vddana-supply = <&vdd_3v3_lp_reg>;
93             vref-supply = <&vdd_3v3_lp_reg>;
94             atmel,trigger-edge-type = <IRQ_TYPE_EDGE_BOTH>;
96             dma-names = "rx";
97             #io-channel-cells = <1>;