Lines Matching +full:vdddo +full:- +full:supply
1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/qcom,i2c-cci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Loic Poulain <loic.poulain@linaro.org>
11 - Robert Foss <robert.foss@linaro.org>
16 - enum:
17 - qcom,msm8226-cci
18 - qcom,msm8974-cci
19 - qcom,msm8996-cci
21 - items:
22 - enum:
23 - qcom,msm8916-cci
24 - const: qcom,msm8226-cci # CCI v1
26 - items:
27 - enum:
28 - qcom,sc7280-cci
29 - qcom,sc8280xp-cci
30 - qcom,sdm845-cci
31 - qcom,sm6350-cci
32 - qcom,sm8250-cci
33 - qcom,sm8450-cci
34 - qcom,sm8550-cci
35 - qcom,sm8650-cci
36 - const: qcom,msm8996-cci # CCI v2
38 "#address-cells":
41 "#size-cells":
48 clock-names:
55 power-domains:
62 "^i2c-bus@[01]$":
63 $ref: /schemas/i2c/i2c-controller.yaml#
70 clock-frequency:
74 - compatible
75 - clock-names
76 - clocks
77 - interrupts
78 - reg
81 - if:
86 - qcom,msm8996-cci
89 - power-domains
91 - if:
96 - qcom,msm8226-cci
97 - qcom,msm8916-cci
100 i2c-bus@1: false
102 - if:
106 - contains:
108 - qcom,msm8974-cci
110 - const: qcom,msm8226-cci
115 clock-names:
117 - const: camss_top_ahb
118 - const: cci_ahb
119 - const: cci
121 - if:
125 - contains:
127 - qcom,msm8916-cci
129 - const: qcom,msm8996-cci
135 clock-names:
137 - const: camss_top_ahb
138 - const: cci_ahb
139 - const: cci
140 - const: camss_ahb
142 - if:
147 - qcom,sdm845-cci
148 - qcom,sm6350-cci
153 clock-names:
155 - const: camnoc_axi
156 - const: soc_ahb
157 - const: slow_ahb_src
158 - const: cpas_ahb
159 - const: cci
160 - const: cci_src
162 - if:
167 - qcom,sc7280-cci
168 - qcom,sm8250-cci
169 - qcom,sm8450-cci
175 clock-names:
177 - const: camnoc_axi
178 - const: slow_ahb_src
179 - const: cpas_ahb
180 - const: cci
181 - const: cci_src
183 - if:
188 - qcom,sc8280xp-cci
194 clock-names:
196 - const: camnoc_axi
197 - const: slow_ahb_src
198 - const: cpas_ahb
199 - const: cci
201 - if:
206 - qcom,sm8550-cci
207 - qcom,sm8650-cci
213 clock-names:
215 - const: camnoc_axi
216 - const: cpas_ahb
217 - const: cci
222 - |
223 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
224 #include <dt-bindings/gpio/gpio.h>
225 #include <dt-bindings/interrupt-controller/arm-gic.h>
229 compatible = "qcom,sdm845-cci", "qcom,msm8996-cci";
230 #address-cells = <1>;
231 #size-cells = <0>;
234 power-domains = <&clock_camcc TITAN_TOP_GDSC>;
242 clock-names = "camnoc_axi",
249 assigned-clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
251 assigned-clock-rates = <80000000>,
254 pinctrl-names = "default", "sleep";
255 pinctrl-0 = <&cci0_default &cci1_default>;
256 pinctrl-1 = <&cci0_sleep &cci1_sleep>;
258 i2c-bus@0 {
260 clock-frequency = <1000000>;
261 #address-cells = <1>;
262 #size-cells = <0>;
268 reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
269 pinctrl-names = "default";
270 pinctrl-0 = <&cam0_default>;
273 clock-names = "xvclk";
274 clock-frequency = <19200000>;
276 dovdd-supply = <&vreg_lvs1a_1p8>;
277 avdd-supply = <&cam0_avdd_2v8>;
278 dvdd-supply = <&cam0_dvdd_1v2>;
282 link-frequencies = /bits/ 64 <360000000 180000000>;
283 data-lanes = <1 2 3 4>;
284 remote-endpoint = <&csiphy0_ep>;
290 cci_i2c1: i2c-bus@1 {
292 clock-frequency = <1000000>;
293 #address-cells = <1>;
294 #size-cells = <0>;
300 enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
301 pinctrl-names = "default";
302 pinctrl-0 = <&cam3_default>;
305 clock-names = "xclk";
306 clock-frequency = <24000000>;
308 vdddo-supply = <&vreg_lvs1a_1p8>;
309 vdda-supply = <&cam3_avdd_2v8>;
313 data-lanes = <0>;
314 link-frequencies = /bits/ 64 <240000000 319200000>;
315 remote-endpoint = <&csiphy3_ep>;