bindings/i2c/i2c-mpc.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mpc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: I2C-Bus adapter for MPC824x/83xx/85xx/86xx/512x/52xx SoCs
10   - Chris Packham <chris.packham@alliedtelesis.co.nz>
13   - $ref: /schemas/i2c/i2c-controller.yaml#
18       - items:
19           - enum:
20               - mpc5200-i2c
21               - fsl,mpc5200-i2c
22               - fsl,mpc5121-i2c
23               - fsl,mpc8313-i2c
24               - fsl,mpc8543-i2c
25               - fsl,mpc8544-i2c
26           - const: fsl-i2c
27       - items:
28           - const: fsl,mpc5200b-i2c
29           - const: fsl,mpc5200-i2c
30           - const: fsl-i2c
38   fsl,preserve-clocking:
44   fsl,timeout:
48       I2C bus timeout in microseconds
50   fsl,i2c-erratum-a004447:
53       Indicates the presence of QorIQ erratum A-004447, which
54       says that the standard i2c recovery scheme mechanism does
58   - compatible
59   - reg
60   - interrupts
65   - |
67     i2c@1740 {
68         #address-cells = <1>;
69         #size-cells = <0>;
70         compatible = "fsl,mpc5121-i2c", "fsl-i2c";
73         interrupt-parent = <&ipic>;
74         clock-frequency = <100000>;
77   - |
79     i2c@3d00 {
80         #address-cells = <1>;
81         #size-cells = <0>;
82         compatible = "fsl,mpc5200b-i2c", "fsl,mpc5200-i2c", "fsl-i2c";
85         interrupt-parent = <&mpc5200_pic>;
86         fsl,preserve-clocking;
89   - |
91     i2c@3100 {
92         #address-cells = <1>;
93         #size-cells = <0>;
94         compatible = "fsl,mpc8544-i2c", "fsl-i2c";
97         interrupt-parent = <&mpic>;
98         clock-frequency = <400000>;
99         i2c-transfer-timeout-us = <10000>;