Lines Matching +full:spi +full:- +full:slave
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fpga/xlnx,fpga-slave-serial.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx Slave Serial SPI FPGA
10 - Nava kishore Manne <nava.kishore.manne@amd.com>
13 Xilinx Spartan-6 and 7 Series FPGAs support a method of loading the bitstream
14 over what is referred to as slave serial interface.The slave serial link is
15 not technically SPI, and might require extra circuits in order to play nicely
16 with other SPI slaves on the same bus.
21 https://www.xilinx.com/support/documentation/application_notes/xapp583-fpga-configuration.pdf
24 - $ref: /schemas/spi/spi-peripheral-props.yaml#
29 - xlnx,fpga-slave-serial
31 spi-cpha: true
33 spi-max-frequency:
39 prog_b-gpios:
44 done-gpios:
49 init-b-gpios:
56 - compatible
57 - reg
58 - prog_b-gpios
59 - done-gpios
60 - init-b-gpios
65 - |
66 #include <dt-bindings/gpio/gpio.h>
67 spi {
68 #address-cells = <1>;
69 #size-cells = <0>;
70 fpga_mgr_spi: fpga-mgr@0 {
71 compatible = "xlnx,fpga-slave-serial";
72 spi-max-frequency = <60000000>;
73 spi-cpha;
75 prog_b-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
76 init-b-gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
77 done-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;