Lines Matching full:reconfiguration

25   FPGA Regions represent FPGA's and partial reconfiguration regions of FPGA's in
38   Full Reconfiguration
41   Partial Reconfiguration (PR)
46   Partial Reconfiguration Region (PRR)
48    * A PRR is a specific section of an FPGA reserved for reconfiguration.
69    * During Full Reconfiguration, hardware bridges between the host and FPGA
71    * During Partial Reconfiguration of a specific region, that region's bridge
85    * An FPGA image that is designed to do full reconfiguration of the FPGA.
86    * A base image may set up a set of partial reconfiguration regions that may
151   reconfiguration.  It must include a phandle to an FPGA Manager.  The base
157   For partial reconfiguration (PR), each PR region will have an FPGA Region.
159   base FPGA region.  The "Full Reconfiguration to add PRR's" example below shows
184      reconfiguration.
186    * Full reconfiguration with hardware bridges
188      need to be controlled during full reconfiguration.  Before the overlay is
194    * Partial reconfiguration with bridges in the FPGA
199      reconfiguration can be done, a base FPGA image must be loaded which includes
207   constraints required to make partial reconfiguration work[1] [2] [3], but a few
215   FPGA Bridges that exist on the FPGA fabric prior to the partial reconfiguration.
279       Set if partial reconfiguration is to be done, otherwise full
280       reconfiguration is done.
302      * Full Reconfiguration without Bridges with DT overlay
324      * Partial reconfiguration with bridge