Lines Matching full:prr
46 Partial Reconfiguration Region (PRR)
48 * A PRR is a specific section of an FPGA reserved for reconfiguration.
49 * A base (or static) FPGA image may create a set of PRR's that later may
51 * The size and specific location of each PRR is fixed.
52 * The connections at the edge of each PRR are fixed. The image that is loaded
53 into a PRR must fit and must use a subset of the region's connections.
59 * An FPGA image that is designed to be loaded into a PRR. There may be
60 any number of personas designed to fit into a PRR, but only one at a time
108 a soft logic bridge (Bridge0-2) in the FPGA. The contents of each PRR can be
159 base FPGA region. The "Full Reconfiguration to add PRR's" example below shows
195 In this case, the FPGA will have one or more PRR's that may be programmed
200 PRR's with FPGA bridges. The device tree should have an FPGA region for each
201 PRR.