Lines Matching +full:0 +full:xc3000001
20 and Management Interface Platform Design Document")[0] provide for OSPM in
23 [0] https://developer.arm.com/documentation/den0056/latest
117 const: 0
125 default: 0
150 const: 0x11
164 const: 0x12
172 const: 0x13
193 const: 0x14
207 const: 0x15
221 const: 0x16
235 const: 0x17
248 const: 0
251 '^regulator@[0-9a-f]+$':
270 const: 0x18
284 const: 0x19
395 mboxes = <&mhuB 0 0>,
396 <&mhuB 0 1>;
402 #size-cells = <0>;
407 reg = <0x11>;
412 reg = <0x13>;
415 mboxes = <&mhuB 1 0>,
423 reg = <0x14>;
428 reg = <0x15>;
433 reg = <0x16>;
438 reg = <0x17>;
441 #size-cells = <0>;
443 regulator_devX: regulator@0 {
444 reg = <0x0>;
449 reg = <0x9>;
457 reg = <0x18>;
461 reg = <0x19>;
487 reg = <0x0 0x50000000 0x0 0x10000>;
491 ranges = <0 0x0 0x50000000 0x10000>;
493 cpu_scp_lpri0: scp-sram-section@0 {
495 reg = <0x0 0x80>;
500 reg = <0x80 0x80>;
505 reg = <0x100 0x80>;
510 reg = <0x180 0x80>;
520 arm,smc-id = <0xc3000001>;
523 #size-cells = <0>;
526 reg = <0x11>;
536 linaro,optee-channel-id = <0>;
539 #size-cells = <0>;
542 reg = <0x13>;
549 reg = <0x14>;
561 reg = <0x0 0x51000000 0x0 0x10000>;
565 ranges = <0 0x0 0x51000000 0x10000>;
567 cpu_optee_lpri0: optee-sram-section@0 {
569 reg = <0x0 0x80>;