dma/ti/k3-pktdma.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
5 ---
6 $id: http://devicetree.org/schemas/dma/ti/k3-pktdma.yaml#
7 $schema: http://devicetree.org/meta-schemas/core.yaml#
12   - Peter Ujfalusi <peter.ujfalusi@gmail.com>
16   mode channels of K3 UDMA-P.
17   PKTDMA only includes Split channels to service PSI-L based peripherals.
19   The peripherals can be PSI-L native or legacy, non PSI-L native peripherals
20   with PDMAs. PDMA is tasked to act as a bridge between the PSI-L fabric and the
27   - $ref: /schemas/dma/dma-controller.yaml#
28   - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
32     const: ti,am64-dmss-pktdma
34   "#dma-cells":
37       The first cell is the PSI-L  thread ID of the remote (to PKTDMA) end.
39       for source thread IDs (rx): 0 - 0x7fff
40       for destination thread IDs (tx): 0x8000 - 0xffff
42       Please refer to the device documentation for the PSI-L thread map and also
43       the PSI-L peripheral chapter for the correct thread ID.
50       - description: Packet DMA Control /Status Registers region
51       - description: RX Channel Realtime Registers region
52       - description: TX Channel Realtime Registers region
53       - description: Ring Realtime Registers region
54       - description: Ring Configuration Registers region
55       - description: TX Configuration Registers region
56       - description: RX Configuration Registers region
57       - description: RX Flow Configuration Registers region
59   reg-names:
62       - const: gcfg
63       - const: rchanrt
64       - const: tchanrt
65       - const: ringrt
66       - const: ring
67       - const: tchan
68       - const: rchan
69       - const: rflow
71   msi-parent: true
73   ti,sci-rm-range-tchan:
74     $ref: /schemas/types.yaml#/definitions/uint32-array
84   ti,sci-rm-range-tflow:
85     $ref: /schemas/types.yaml#/definitions/uint32-array
95   ti,sci-rm-range-rchan:
96     $ref: /schemas/types.yaml#/definitions/uint32-array
106   ti,sci-rm-range-rflow:
107     $ref: /schemas/types.yaml#/definitions/uint32-array
118   - compatible
119   - "#dma-cells"
120   - reg
121   - reg-names
122   - msi-parent
123   - ti,sci
124   - ti,sci-dev-id
125   - ti,sci-rm-range-tchan
126   - ti,sci-rm-range-tflow
127   - ti,sci-rm-range-rchan
128   - ti,sci-rm-range-rflow
133   - |+
135         #address-cells = <2>;
136         #size-cells = <2>;
139             compatible = "simple-mfd";
140             #address-cells = <2>;
141             #size-cells = <2>;
142             dma-ranges;
145             ti,sci-dev-id = <25>;
147             main_pktdma: dma-controller@485c0000 {
148                 compatible = "ti,am64-dmss-pktdma";
158                 reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt",
161                 msi-parent = <&inta_main_dmss>;
162                 #dma-cells = <2>;
165                 ti,sci-dev-id = <30>;
167                 ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
173                 ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
179                 ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
187                 ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */