bindings/dma/fsl-qdma.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/fsl-qdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Frank Li <Frank.Li@nxp.com>
15       - const: fsl,ls1021a-qdma
16       - items:
17           - enum:
18               - fsl,ls1028a-qdma
19               - fsl,ls1043a-qdma
20               - fsl,ls1046a-qdma
21           - const: fsl,ls1021a-qdma
25       - description: Controller regs
26       - description: Status regs
27       - description: Block regs
33   interrupt-names:
36       - const: qdma-error
37       - const: qdma-queue0
38       - const: qdma-queue1
39       - const: qdma-queue2
40       - const: qdma-queue3
42   dma-channels:
46   fsl,dma-queues:
52   block-number:
56   block-offset:
60   status-sizes:
64   queue-sizes:
65     $ref: /schemas/types.yaml#/definitions/uint32-array
70   big-endian:
74       of the qDMA are implemented in big endian mode, otherwise in little
78   - compatible
79   - reg
80   - interrupts
81   - interrupt-names
82   - fsl,dma-queues
83   - block-number
84   - block-offset
85   - status-sizes
86   - queue-sizes
89   - $ref: dma-controller.yaml#
90   - if:
95               - fsl,ls1028a-qdma
96               - fsl,ls1043a-qdma
97               - fsl,ls1046a-qdma
102         interrupt-names:
108         interrupt-names:
114   - |
115     #include <dt-bindings/interrupt-controller/arm-gic.h>
117     dma-controller@8390000 {
118         compatible = "fsl,ls1021a-qdma";
119         reg = <0x8388000 0x1000>, /* Controller regs */
120               <0x8389000 0x1000>, /* Status regs */
121               <0x838a000 0x2000>; /* Block regs */
125         interrupt-names = "qdma-error", "qdma-queue0", "qdma-queue1";
126         #dma-cells = <1>;
127         dma-channels = <8>;
128         block-number = <2>;
129         block-offset = <0x1000>;
130         status-sizes = <64>;
131         queue-sizes = <64 64>;
132         big-endian;
133         fsl,dma-queues = <2>;