bindings/dma/altr%2Cmsgdma.yaml

1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/dma/altr,msgdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Altera mSGDMA IP core
10   - Olivier Dautricourt <olivierdautricourt@gmail.com>
13   Altera / Intel modular Scatter-Gather Direct Memory Access (mSGDMA)
17   - $ref: dma-controller.yaml#
21     const: altr,socfpga-msgdma
25       - description: Control and Status Register Slave Port
26       - description: Descriptor Slave Port
27       - description: Response Slave Port (Optional)
30   reg-names:
32       - const: csr
33       - const: desc
34       - const: resp
40   "#dma-cells":
46   - compatible
47   - reg
48   - reg-names
49   - interrupts
54   - |
55     #include <dt-bindings/interrupt-controller/irq.h>
57     msgdma_controller: dma-controller@ff200b00 {
58         compatible = "altr,socfpga-msgdma";
60         reg-names = "csr", "desc", "resp";
62         #dma-cells = <1>;