Lines Matching +full:max +full:- +full:memory +full:- +full:bandwidth
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/ti/ti,am65x-dss.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Jyri Sarha <jsarha@ti.com>
12 - Tomi Valkeinen <tomi.valkeinen@ti.com>
25 - ti,am625-dss
26 - ti,am62a7,dss
27 - ti,am65x-dss
31 Addresses to each DSS memory region described in the SoC's TRM.
33 - description: common DSS register area
34 - description: VIDL1 light video plane
35 - description: VID video plane
36 - description: OVR1 overlay manager for vp1
37 - description: OVR2 overlay manager for vp2
38 - description: VP1 video port 1
39 - description: VP2 video port 2
40 - description: common1 DSS register area
42 reg-names:
44 - const: common
45 - const: vidl1
46 - const: vid
47 - const: ovr1
48 - const: ovr2
49 - const: vp1
50 - const: vp2
51 - const: common1
55 - description: fck DSS functional clock
56 - description: vp1 Video Port 1 pixel clock
57 - description: vp2 Video Port 2 pixel clock
59 clock-names:
61 - const: fck
62 - const: vp1
63 - const: vp2
65 assigned-clocks:
69 assigned-clock-parents:
76 power-domains:
80 dma-coherent:
100 ti,am65x-oldi-io-ctrl:
109 max-memory-bandwidth:
112 Input memory (from main memory to dispc) bandwidth limit in
116 - if:
120 const: ti,am62a7-dss
128 - compatible
129 - reg
130 - reg-names
131 - clocks
132 - clock-names
133 - interrupts
134 - ports
139 - |
140 #include <dt-bindings/interrupt-controller/arm-gic.h>
141 #include <dt-bindings/interrupt-controller/irq.h>
142 #include <dt-bindings/soc/ti,sci_pm_domain.h>
145 compatible = "ti,am65x-dss";
154 reg-names = "common", "vidl1", "vid",
156 ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>;
157 power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>;
161 clock-names = "fck", "vp1", "vp2";
164 #address-cells = <1>;
165 #size-cells = <0>;
169 remote-endpoint = <&lcd_in0>;