Lines Matching +full:tegra20 +full:- +full:gr2d
1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-host1x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
13 description: The host1x top-level node defines a number of children, each
19 - enum:
20 - nvidia,tegra20-host1x
21 - nvidia,tegra30-host1x
22 - nvidia,tegra114-host1x
23 - nvidia,tegra124-host1x
24 - nvidia,tegra210-host1x
25 - nvidia,tegra186-host1x
26 - nvidia,tegra194-host1x
27 - nvidia,tegra234-host1x
29 - items:
30 - const: nvidia,tegra132-host1x
31 - const: nvidia,tegra124-host1x
37 reg-names:
45 interrupt-names:
49 '#address-cells':
54 '#size-cells':
64 ../clocks/clock-bindings.txt for details.
66 clock-names:
68 - const: host1x
73 - description: module reset
74 - description: memory client hotflush reset
76 reset-names:
79 - const: host1x
80 - const: mc
87 - description: memory read client for host1x
89 interconnect-names:
91 - const: dma-mem # read
93 operating-points-v2: true
95 power-domains:
97 - description: phandle to the HEG or core power domain
100 - compatible
101 - interrupts
102 - interrupt-names
103 - '#address-cells'
104 - '#size-cells'
105 - ranges
106 - reg
107 - clocks
108 - clock-names
114 - if:
119 - nvidia,tegra20-host1x
120 - nvidia,tegra30-host1x
121 - nvidia,tegra114-host1x
122 - nvidia,tegra124-host1x
123 - nvidia,tegra210-host1x
128 - description: host1x syncpoint interrupt
129 - description: host1x general interrupt
131 interrupt-names:
133 - const: syncpt
134 - const: host1x
136 - resets
137 - reset-names
138 - if:
143 - nvidia,tegra186-host1x
144 - nvidia,tegra194-host1x
147 reg-names:
149 - const: hypervisor
150 - const: vm
154 - description: region used by the hypervisor
155 - description: region assigned to the virtual machine
160 reset-names:
165 - description: host1x syncpoint interrupt
166 - description: host1x general interrupt
168 interrupt-names:
170 - const: syncpt
171 - const: host1x
173 iommu-map:
179 - reg-names
180 - if:
185 - nvidia,tegra194-host1x
188 dma-coherent: true
189 - if:
194 - nvidia,tegra234-host1x
197 reg-names:
199 - const: common
200 - const: hypervisor
201 - const: vm
205 - description: region used by host1x server
206 - description: region used by the hypervisor
207 - description: region assigned to the virtual machine
211 - description: host1x syncpoint interrupt 0
212 - description: host1x syncpoint interrupt 1
213 - description: host1x syncpoint interrupt 2
214 - description: host1x syncpoint interrupt 3
215 - description: host1x syncpoint interrupt 4
216 - description: host1x syncpoint interrupt 5
217 - description: host1x syncpoint interrupt 6
218 - description: host1x syncpoint interrupt 7
219 - description: host1x general interrupt
221 interrupt-names:
223 - const: syncpt0
224 - const: syncpt1
225 - const: syncpt2
226 - const: syncpt3
227 - const: syncpt4
228 - const: syncpt5
229 - const: syncpt6
230 - const: syncpt7
231 - const: host1x
233 iommu-map:
238 dma-coherent: true
241 - reg-names
244 - |
245 #include <dt-bindings/clock/tegra20-car.h>
246 #include <dt-bindings/gpio/tegra-gpio.h>
247 #include <dt-bindings/memory/tegra20-mc.h>
250 compatible = "nvidia,tegra20-host1x";
254 interrupt-names = "syncpt", "host1x";
256 clock-names = "host1x";
258 reset-names = "host1x", "mc";
260 #address-cells = <1>;
261 #size-cells = <1>;
266 compatible = "nvidia,tegra20-mpe";
271 reset-names = "mpe";
275 compatible = "nvidia,tegra20-vi";
280 reset-names = "vi";
284 compatible = "nvidia,tegra20-epp";
289 reset-names = "epp";
293 compatible = "nvidia,tegra20-isp";
298 reset-names = "isp";
301 gr2d@54140000 {
302 compatible = "nvidia,tegra20-gr2d";
307 reset-names = "2d", "mc";
311 compatible = "nvidia,tegra20-gr3d";
315 reset-names = "3d", "mc";
319 compatible = "nvidia,tegra20-dc";
323 clock-names = "dc";
325 reset-names = "dc";
332 compatible = "nvidia,tegra20-dc";
336 clock-names = "dc";
338 reset-names = "dc";
345 compatible = "nvidia,tegra20-hdmi";
350 clock-names = "hdmi", "parent";
352 reset-names = "hdmi";
354 hdmi-supply = <&vdd_5v0_hdmi>;
355 pll-supply = <&vdd_hdmi_pll>;
356 vdd-supply = <&vdd_3v3_hdmi>;
358 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
359 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
363 compatible = "nvidia,tegra20-tvo";
370 compatible = "nvidia,tegra20-dsi";
374 clock-names = "dsi", "parent";
376 reset-names = "dsi";
380 - |
381 #include <dt-bindings/clock/tegra210-car.h>
382 #include <dt-bindings/interrupt-controller/arm-gic.h>
383 #include <dt-bindings/memory/tegra210-mc.h>
386 compatible = "nvidia,tegra210-host1x";
390 interrupt-names = "syncpt", "host1x";
392 clock-names = "host1x";
394 reset-names = "host1x";
396 #address-cells = <1>;
397 #size-cells = <1>;
403 compatible = "nvidia,tegra210-vi";
406 assigned-clocks = <&tegra_car TEGRA210_CLK_VI>;
407 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>;
410 power-domains = <&pd_venc>;
412 #address-cells = <1>;
413 #size-cells = <1>;
418 compatible = "nvidia,tegra210-csi";
420 assigned-clocks = <&tegra_car TEGRA210_CLK_CILAB>,
424 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_P>,
427 assigned-clock-rates = <102000000>,
437 clock-names = "csi", "cilab", "cilcd", "cile", "csi_tpg";
438 power-domains = <&pd_sor>;