Lines Matching full:bpmp

128         resets = <&bpmp TEGRA186_RESET_NVDISPLAY0_MISC>,
129                  <&bpmp TEGRA186_RESET_NVDISPLAY0_WGRP0>,
130                  <&bpmp TEGRA186_RESET_NVDISPLAY0_WGRP1>,
131                  <&bpmp TEGRA186_RESET_NVDISPLAY0_WGRP2>,
132                  <&bpmp TEGRA186_RESET_NVDISPLAY0_WGRP3>,
133                  <&bpmp TEGRA186_RESET_NVDISPLAY0_WGRP4>,
134                  <&bpmp TEGRA186_RESET_NVDISPLAY0_WGRP5>;
137         clocks = <&bpmp TEGRA186_CLK_NVDISPLAY_DISP>,
138                  <&bpmp TEGRA186_CLK_NVDISPLAY_DSC>,
139                  <&bpmp TEGRA186_CLK_NVDISPLAYHUB>;
142         power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISP>;
153             clocks = <&bpmp TEGRA186_CLK_NVDISPLAY_P0>;
155             resets = <&bpmp TEGRA186_RESET_NVDISPLAY0_HEAD0>;
158             power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISP>;
172             clocks = <&bpmp TEGRA186_CLK_NVDISPLAY_P1>;
174             resets = <&bpmp TEGRA186_RESET_NVDISPLAY0_HEAD1>;
177             power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISPB>;
191             clocks = <&bpmp TEGRA186_CLK_NVDISPLAY_P2>;
193             resets = <&bpmp TEGRA186_RESET_NVDISPLAY0_HEAD2>;
196             power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISPC>;
217         resets = <&bpmp TEGRA194_RESET_NVDISPLAY0_MISC>,
218                  <&bpmp TEGRA194_RESET_NVDISPLAY0_WGRP0>,
219                  <&bpmp TEGRA194_RESET_NVDISPLAY0_WGRP1>,
220                  <&bpmp TEGRA194_RESET_NVDISPLAY0_WGRP2>,
221                  <&bpmp TEGRA194_RESET_NVDISPLAY0_WGRP3>,
222                  <&bpmp TEGRA194_RESET_NVDISPLAY0_WGRP4>,
223                  <&bpmp TEGRA194_RESET_NVDISPLAY0_WGRP5>;
226         clocks = <&bpmp TEGRA194_CLK_NVDISPLAY_DISP>,
227                  <&bpmp TEGRA194_CLK_NVDISPLAYHUB>;
230         power-domains = <&bpmp TEGRA194_POWER_DOMAIN_DISP>;
241             clocks = <&bpmp TEGRA194_CLK_NVDISPLAY_P0>;
243             resets = <&bpmp TEGRA194_RESET_NVDISPLAY0_HEAD0>;
246             power-domains = <&bpmp TEGRA194_POWER_DOMAIN_DISP>;
259             clocks = <&bpmp TEGRA194_CLK_NVDISPLAY_P1>;
261             resets = <&bpmp TEGRA194_RESET_NVDISPLAY0_HEAD1>;
264             power-domains = <&bpmp TEGRA194_POWER_DOMAIN_DISPB>;
277             clocks = <&bpmp TEGRA194_CLK_NVDISPLAY_P2>;
279             resets = <&bpmp TEGRA194_RESET_NVDISPLAY0_HEAD2>;
282             power-domains = <&bpmp TEGRA194_POWER_DOMAIN_DISPC>;
295             clocks = <&bpmp TEGRA194_CLK_NVDISPLAY_P3>;
297             resets = <&bpmp TEGRA194_RESET_NVDISPLAY0_HEAD3>;
300             power-domains = <&bpmp TEGRA194_POWER_DOMAIN_DISPC>;