display/tegra/nvidia%2Ctegra124-sor.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-sor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Thierry Reding <thierry.reding@gmail.com>
11   - Jon Hunter <jonathanh@nvidia.com>
19     pattern: "^sor@[0-9a-f]+$"
23       - enum:
24           - nvidia,tegra124-sor
25           - nvidia,tegra210-sor
26           - nvidia,tegra210-sor1
27           - nvidia,tegra186-sor
28           - nvidia,tegra186-sor1
29           - nvidia,tegra194-sor
31       - items:
32           - const: nvidia,tegra132-sor
33           - const: nvidia,tegra124-sor
45   clock-names:
51       - description: module reset
53   reset-names:
55       - const: sor
57   power-domains:
60   avdd-io-hdmi-dp-supply:
63   vdd-hdmi-dp-pll-supply:
66   hdmi-supply:
74   nvidia,ddc-i2c-bus:
75     description: phandle of an I2C controller used for DDC EDID
79   nvidia,hpd-gpio:
85     $ref: /schemas/types.yaml#/definitions/uint8-array
91   nvidia,xbar-cfg:
96     $ref: /schemas/types.yaml#/definitions/uint32-array
104   - if:
109               - nvidia,tegra186-sor
110               - nvidia,tegra194-sor
115             - description: clock input for the SOR hardware
116             - description: SOR output clock
117             - description: input for the pixel clock
118             - description: reference clock for the SOR clock
119             - description: safe reference clock for the SOR clock
121             - description: SOR pad output clock
123         clock-names:
125             - const: sor
126             - enum:
127                 - source # deprecated
128                 - out
129             - const: parent
130             - const: dp
131             - const: safe
132             - const: pad
137             - description: clock input for the SOR hardware
138             - description: SOR output clock
139             - description: input for the pixel clock
140             - description: reference clock for the SOR clock
141             - description: safe reference clock for the SOR clock
144         clock-names:
146             - const: sor
147             - enum:
148                 - source # deprecated
149                 - out
150             - const: parent
151             - const: dp
152             - const: safe
157   - compatible
158   - reg
159   - interrupts
160   - clocks
161   - clock-names
162   - resets
163   - reset-names
164   - avdd-io-hdmi-dp-supply
165   - vdd-hdmi-dp-pll-supply
168   - |
169     #include <dt-bindings/clock/tegra210-car.h>
170     #include <dt-bindings/gpio/tegra-gpio.h>
171     #include <dt-bindings/interrupt-controller/arm-gic.h>
174         compatible = "nvidia,tegra210-sor";
182         clock-names = "sor", "out", "parent", "dp", "safe";
184         reset-names = "sor";
185         pinctrl-0 = <&state_dpaux_aux>;
186         pinctrl-1 = <&state_dpaux_i2c>;
187         pinctrl-2 = <&state_dpaux_off>;
188         pinctrl-names = "aux", "i2c", "off";
189         power-domains = <&pd_sor>;
191         avdd-io-hdmi-dp-supply = <&avdd_1v05>;
192         vdd-hdmi-dp-pll-supply = <&vdd_1v8>;
193         hdmi-supply = <&vdd_hdmi>;
195         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
196         nvidia,hpd-gpio = <&gpio TEGRA_GPIO(CC, 1) GPIO_ACTIVE_LOW>;