Lines Matching +full:0 +full:x9c00000
97 - pinctrl-0: pin control handle
124 reg = <0xfe85A800 0x300>;
130 reg = <0xfd348000 0x400>;
136 reg = <0xfe858200 0x300>;
142 reg = <0xfd348400 0x400>;
149 reg = <0xfee82800 0x200>;
156 reg = <0xfee82a00 0x200>;
163 reg = <0xfd349000 0x200>, <0xfd320000 0x10000>;
170 reg = <0xfd349200 0x200>, <0xfd320000 0x10000>;
181 reg = <0xfd340000 0x1000>;
193 reg = <0xfe000000 0x1000>, <0xfe85a000 0x400>, <0xfe830000 0x10000>;
201 reg = <0xfe85c000 0x1000>, <0xfe830000 0x10000>;
211 reg = <0xfe85a000 0x400>, <0xfe83085c 0x4>;
219 reg = <0x8d00400 0x200>;
224 <&clk_s_d2_quadfs 0>, <&clk_s_d2_quadfs 1>;
226 pinctrl-0 = <&pinctrl_dvo>;
232 reg = <0x9C00000 0x100000>;