display/samsung/samsung%2Cexynos7-decon.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos7-decon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Inki Dae <inki.dae@samsung.com>
11   - Seung-Woo Kim <sw0312.kim@samsung.com>
12   - Kyungmin Park <kyungmin.park@samsung.com>
13   - Krzysztof Kozlowski <krzk@kernel.org>
22     const: samsung,exynos7-decon
27   clock-names:
29       - const: pclk_decon0
30       - const: aclk_decon0
31       - const: decon0_eclk
32       - const: decon0_vclk
34   display-timings:
35     $ref: ../panel/display-timings.yaml#
37   i80-if-timings:
42       cs-setup:
45           Clock cycles for the active period of address signal is enabled until
49       wr-active:
52           Clock cycles for the active period of CS is enabled.
55       wr-hold:
58           Clock cycles for the active period of CS is disabled until write
62       wr-setup:
65           Clock cycles for the active period of CS signal is enabled until
71       - description: FIFO level
72       - description: VSYNC
73       - description: LCD system
75   interrupt-names:
77       - const: fifo
78       - const: vsync
79       - const: lcd_sys
81   power-domains:
88   - compatible
89   - clocks
90   - clock-names
91   - interrupts
92   - interrupt-names
93   - reg
98   - |
99     #include <dt-bindings/clock/exynos7-clk.h>
100     #include <dt-bindings/interrupt-controller/arm-gic.h>
102     display-controller@13930000 {
103         compatible = "samsung,exynos7-decon";
105         interrupt-names = "fifo", "vsync", "lcd_sys";
113         clock-names = "pclk_decon0",
117         pinctrl-0 = <&lcd_clk &pwm1_out>;
118         pinctrl-names = "default";