Lines Matching +full:0 +full:x0aeb0000

47   "^display-controller@[0-9a-f]+$":
55   "^displayport-controller@[0-9a-f]+$":
65   "^dsi@[0-9a-f]+$":
75   "^phy@[0-9a-f]+$":
99         reg = <0x0ae00000 0x1000>;
118         iommus = <&apps_smmu 0x820 0x402>;
126             reg = <0x0ae01000 0x8f000>,
127                   <0x0aeb0000 0x2008>;
143             interrupts = <0>;
147                 #size-cells = <0>;
149                 port@0 {
150                     reg = <0>;
191             reg = <0x0ae94000 0x400>;
212             assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
221             #size-cells = <0>;
225                 #size-cells = <0>;
227                 port@0 {
228                     reg = <0>;
263             reg = <0x0ae94400 0x200>,
264                   <0x0ae94600 0x280>,
265                   <0x0ae94900 0x260>;
271             #phy-cells = <0>;
281             reg = <0x0ae96000 0x400>;
302             assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>;
311             #size-cells = <0>;
315                 #size-cells = <0>;
317                 port@0 {
318                     reg = <0>;
334             reg = <0x0ae96400 0x200>,
335                   <0x0ae96600 0x280>,
336                   <0x0ae96900 0x260>;
342             #phy-cells = <0>;