Lines Matching +full:0 +full:x0ae01000

48   "^display-controller@[0-9a-f]+$":
56   "^displayport-controller@[0-9a-f]+$":
65   "^dsi@[0-9a-f]+$":
75   "^phy@[0-9a-f]+$":
96         reg = <0x0ae00000 0x1000>;
115         iommus = <&apps_smmu 0x800 0x420>;
123             reg = <0x0ae01000 0x8f000>,
124                   <0x0aeb0000 0x2008>;
140             interrupts = <0>;
144                 #size-cells = <0>;
146                 port@0 {
147                     reg = <0>;
188             reg = <0x0ae94000 0x400>;
209             assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
218             #size-cells = <0>;
222                 #size-cells = <0>;
224                 port@0 {
225                     reg = <0>;
260             reg = <0x0ae94400 0x200>,
261                   <0x0ae94600 0x280>,
262                   <0x0ae94900 0x260>;
268             #phy-cells = <0>;
278             reg = <0x0ae96000 0x400>;
299             assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>;
308             #size-cells = <0>;
312                 #size-cells = <0>;
314                 port@0 {
315                     reg = <0>;
331             reg = <0x0ae96400 0x200>,
332                   <0x0ae96600 0x280>,
333                   <0x0ae96900 0x260>;
339             #phy-cells = <0>;