Lines Matching +full:0 +full:x8f000

43   "^display-controller@[0-9a-f]+$":
51   "^dsi@[0-9a-f]+$":
65   "^phy@[0-9a-f]+$":
90         reg = <0x05e00000 0x1000>;
101         iommus = <&apps_smmu 0x420 0x2>,
102                  <&apps_smmu 0x421 0x0>;
107             reg = <0x05e01000 0x8f000>,
108                   <0x05eb0000 0x2008>;
123             interrupts = <0>;
127                 #size-cells = <0>;
129                 port@0 {
130                     reg = <0>;
140             reg = <0x05e94000 0x400>;
159             assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
166             #size-cells = <0>;
170                 #size-cells = <0>;
172                 port@0 {
173                     reg = <0>;
189             reg = <0x05e94400 0x100>,
190                   <0x05e94500 0x300>,
191                   <0x05e94800 0x188>;
197             #phy-cells = <0>;