Lines Matching full:dispcc
26 - description: Display AHB clock from dispcc
100 #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
113 power-domains = <&dispcc DISP_CC_MDSS_CORE_GDSC>;
115 <&dispcc DISP_CC_MDSS_AHB_CLK>,
116 <&dispcc DISP_CC_MDSS_MDP_CLK>;
142 <&dispcc DISP_CC_MDSS_AHB_CLK>,
143 <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
144 <&dispcc DISP_CC_MDSS_MDP_CLK>,
145 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
193 clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
194 <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
195 <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
196 <&dispcc DISP_CC_MDSS_ESC0_CLK>,
197 <&dispcc DISP_CC_MDSS_AHB_CLK>,
206 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>,
207 <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
269 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
289 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
290 <&dispcc DISP_CC_MDSS_EDP_AUX_CLK>,
291 <&dispcc DISP_CC_MDSS_EDP_LINK_CLK>,
292 <&dispcc DISP_CC_MDSS_EDP_LINK_INTF_CLK>,
293 <&dispcc DISP_CC_MDSS_EDP_PIXEL_CLK>;
299 assigned-clocks = <&dispcc DISP_CC_MDSS_EDP_LINK_CLK_SRC>,
300 <&dispcc DISP_CC_MDSS_EDP_PIXEL_CLK_SRC>;
380 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
381 <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
382 <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
383 <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
384 <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
390 assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
391 <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;