Lines Matching full:dispcc
26 - description: Display AHB clock from dispcc
90 #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
103 power-domains = <&dispcc MDSS_GDSC>;
105 <&dispcc DISP_CC_MDSS_AHB_CLK>,
106 <&dispcc DISP_CC_MDSS_MDP_CLK>;
129 <&dispcc DISP_CC_MDSS_AHB_CLK>,
130 <&dispcc DISP_CC_MDSS_ROT_CLK>,
131 <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
132 <&dispcc DISP_CC_MDSS_MDP_CLK>,
133 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
170 clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
171 <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
172 <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
173 <&dispcc DISP_CC_MDSS_ESC0_CLK>,
174 <&dispcc DISP_CC_MDSS_AHB_CLK>,
183 … assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
245 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
263 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
264 <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
265 <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
266 <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
267 <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
270 assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
271 <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;